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simulation of instruction set extension for transactional memory of modern central processors

Published in № 5(53) 27 october 2014 year
Rubric: Resource management
Authors: Yulyugin E., Rechistov G.
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Simics, TSX, RTM, simulation, transactional memory

The author:

Yulyugin E.

Degree:

Student, Moscow Institute of Physics and Technology, Intel Corporation

All articles:

simulation of instruction set extension for transactional memory of modern central processors

The author:

Rechistov G.

Degree:

Phd in Technique, Intel Corporation

Location:

Moscow

All articles:

simulation of instruction set extension for transactional memory of modern central processors

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