Authors

Rechistov G.

Degree	Phd in Technique, Intel Corporation
E-mail	grigory.rechistov@phystech.edu
Location	Moscow
Articles	simulation of instruction set extension for transactional memory of modern central processors Hardware transactional memory is finally becoming available in products from major vendors. Intel announced that a set of transactional synchronization extensions (TSX) is available in it new processor microarchitecture, codenamed Haswell. The benefits of software simulation of this technology will remain significant even after processors that support new instructions become available on the market. The reason for this is that a simulation often provides more flexibility during debugging and architecture exploration. Transactional memory support in functional simulator is not trivial because it requires explicit cache simulation, which may dramatically affect performance. It was necessary to create a flexible reconfigurable model, as public documentation for TSX omits implementation details. In this paper we describe our implementation of Intel® restricted transactional memory (RTM) instructions, which are a part of the Intel® TSX, in the full system functional simulator Wind River® Simics. Our goal was to ensure correct execution of these new instructions while maintaining high simulation speed that Simics is able to demonstrate. Read more...